New stacking technology: Servers in data centres will require less power in future (Image: mit.edu)

MIT researchers halt dramatic rise in energy consumption with new production technology

Researchers at the Massachusetts Institute of Technology (https://www.mit.edu/ ) (MIT) want to use a new production technology to stack functional components with memory functions on a microprocessor. This should reduce the energy consumption of servers. These are used in data centres. Microprocessors and memory chips are usually separate components. The exchange of data between them increases power consumption, which places an additional burden on the environment in times of artificial intelligence (AI) and cryptocurrencies. This is because the systems are rarely supplied with environmentally neutral electricity.

Also possible with memristors

Memristors, which contain both a microprocessor and memory in a single component, also significantly reduce power consumption, as the distances for data exchange are extremely short and require little energy. However, these components require a completely different production process (https://news.mit.edu/2025/new-materials-could-boost-energy-efficiency-microelectronics-1211) than classic microchips. The MIT solution, on the other hand, builds on this.

‘We need to minimise the energy consumption for AI and other complex calculations in the future, as it is simply not sustainable,’ says Yanjie Shao, a postdoctoral researcher in nanoelectronics and semiconductor physics, who has been instrumental in advancing the development of the new concept. ‘To do this, we need new technologies such as this integration platform,’ he emphasises.

High temperatures as a problem

Until now, it has been virtually impossible to build additional functional elements on chips because the high temperatures required to do so destroy the existing transistors. Thanks to the new MIT integration technology, active components can instead be attached to the back of the chip. ‘Using this back-end platform to insert additional active transistor layers significantly increases the integration density of the chip and improves its energy efficiency,’ says Shao.

The experts have achieved this with the help of amorphous indium oxide. This semiconductor material has not been used for this purpose before. The researchers deposit it at 150 degrees Celsius as an extremely thin layer on the back of an existing semiconductor device. They also add a layer of ferroelectric hafnium zirconium oxide, which serves as a memory component. ‘Now we can build a platform for versatile electronics on the back of a chip, enabling us to achieve high energy efficiency and many different functions in very small devices,’ explains Shao.